ADC's: • 2 Channels, 12-Bit Resolution, 1 GSPS • 2.1 GHz Input Bandwidth • Single Ended AC-Coupled Analog Input • SFDR = 68 dBc @ 800MHz and 1GSPS • SNR = 57.2 dBFS @ 800MHz and 1GSPS • ENOB = 9 bits @ 800 MHz and 1 GSPS • 1.5V to 2V Selectable Full-Scale Range • LVDS-Compatible Outputs, 1 or 2 Bus Options
Other's: • VITA 57.1 Compliant • FMC Interface Connector for Digital Output, Power LEDs and Single-Ended MCX Connector for AIN, AOUT& EXTCLK • Flexible Clock Tree Enables (Internal Clock, External Clock, Internal Clock with External Reference) • Direct ADC Connection to Host FPGA Ensures • Maximum Throughput • Operating Temperature: -40°C to +85°C (Industrial) • Physical Dimensions (L: 83.8 mm, W: 69 mm)
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